Implementation of Adaptive Buffer in Video Receivers Using Network Processor IXP 2400

Implementation of Adaptive Buffer in Video Receivers Using Network Processor IXP 2400

Kandasamy Anusuya, Karupagouder Thirunavukkarasu, and Subha Rani Sundaresan
Faculty in Electronics and Communication Engineering, PSG College of Technology, India


Abstract: New services such as non-interactive video streaming, which demand higher bandwidth have become popular with the introduction of broad band networks. But the quality of streamed video is impaired by the factors such as packet loss, congestion, delay and jitter in the network. Hence, to improve the video quality, an adaptive data rate based play out buffer management scheme is proposed. It mainly considers the play back time and play out buffer size of the video player used at the receiver. Moreover in recent designs, the network processors are used in a wide range of networking embedded systems, including multi service switches, routers and so on. The network processors are fully programmable Processors which performs number of simultaneous operations. This ensures full network performance and also accommodates complex services on packet basis. Hence, the proposed scheme is implemented in the Network Processors, IXP 2400 and its performance is evaluated for different data rates. It is observed that the packet loss is reduced and the buffer utilization is improved. 

Keywords: Buffer utilization, network processor, play out buffer, play back time, video streaming

Received February 6, 2007; accepted November 6, 2008 

Full Text
Read 5067 times Last modified on Wednesday, 20 January 2010 01:28
Share
Top
We use cookies to improve our website. By continuing to use this website, you are giving consent to cookies being used. More details…